A Novel Algorithm of Fundamental Positive Sequence Voltage Detector under Unbalanced and Distorted Voltages

This paper presented a new algorithm for the performance improvement of fundamental positive sequence voltage extraction under unbalanced and distorted conditions. In this algorithm, an improved software phaselocked loop (SPLL) with a second order low-pass filter was proposed and analyzed, completely eliminating the phase detection errors of the unbalanced and distorted source voltages. The paper began with a description of the proposed fundamental positive sequence extraction method, and then a detailed analysis of the designed SPLL was introduced. The proposed algorithm improved the sinusoidal current control strategy of active power filter (APF) which was based on the classical power theories for obtaining an optimal extraction of the fundamental positive sequence current. To verify the feasibility of the algorithm in realtime applications, the simulation model was established in MATLAB-Simulink environment. Then, the algorithm was implemented in DSP using the TMS320F28335 development board. The results indicated that the proposed algorithm is feasible and effective, and it could be directly used in the practical applications.